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Today’s computer engineers face two knotty problems.

One is on the micro level: As processors are made on smaller and smaller chips, power sources for flexible or wearable tech need to be downsized and integrated by the same proportions.

The other is on the macro level: With the increasing number of high-capacity servers needed to support the “internet of things” that will connect all electronic devices, energy efficiency has become more important than ever. It doesn’t just keep costs down but also is good for the planet.

A new joint study from ������ϲ����� and Purdue University will examine both ends of the issue. Working through the newly established Center for Heterogeneous Integration Research in Packaging (CHIRP), principal investigator Pritam Das and co-PI Kanad Ghose will research higher-voltage package power delivery and power-management systems for high-end systems-in-package (SiP) devices.

Funding the study over three years will be a $350,000 grant from the , a nonprofit tech consortium that counts Intel, IBM, Microsoft, Samsung, Qualcomm and Texas Instruments as well as the National Science Foundation among its supporting members.

Das, an assistant professor of electrical and computer engineering at ������ϲ�����’s Thomas J. Watson School of Engineering and Applied Science, said the research will look beyond silicon devices to new materials such as gallium nitride. It also will integrate new theories such as multi-objective optimization processes and nonlinear control theory.

The study will focus on 45-volt DC power supplies that are stepped down to 1 to 5 volts at a high amperage to run the microprocessors. This should lead to increased high-power densities that benefits both small and large devices.

The efficiency of current technology is 88 to 90 percent, but Das believes his and Ghose’s ideas will increase it to 95 or 96 percent. Ghose, a professor in the Watson School’s Department of Computer Science, is the site director for ������ϲ�����’s Center for Energy-Smart Electronic Systems (ES2).

“For every watt you use on these power supplies, you lose about 10 percent of that power,” said Das, who has been at ������ϲ����� for two years. “Consequently, the exponentially rising number of servers means a huge amount of energy that is cumulatively wasted. On top of that, it increases the power load needed to cool down a data center so that network servers are working at the proper temperature.”

Even though the research remains in preliminary stages, Das already has received calls from SRC partners inquiring about it. Intel, for instance, is interested in possible use of the technology developed in this project on its next-generation high-speed computer graphics cards.

“After we proceed with some research and get more in-depth with the work,” Das said, “I think we will be closely interacting with these companies for the real application of these systems onto their next-generation computing loads and microprocessors.”

“Higher Voltage Package Power Delivery and Power Management Systems for High-end SiPs” is SRC project #2878.001.